1. Field of the Invention
The present invention relates to a lead frame for use in manufacture of resin molded type semiconductor devices, and a method of manufacturing semiconductor devices using the lead frame.
2. Description of the Related Art
FIG. 17 is a plan view of a prior art lead frame for semiconductor devices. In FIG. 17, denoted by reference numeral 10 is a lead frame for semiconductor devices (hereinafter referred to as a lead frame), 11 is an island on which a semiconductor device 30 is mounted as shown at the right end in the figure, 12 is an inner lead portion connected to the semiconductor device 30 by a gold wire 31 for supplying electric power and transferring various signals, and 13 is an outer lead portion exposed outwardly of a later-described sealing resin 16 shown in FIG. 18. The outer lead portion 13 extends from the inner lead portion 12 in a continuous relation so as to form one lead. Further, 14 is a tie bar interconnecting leads while reinforcing them so that the leads will not move out of order. The tie bar also serves to stem a flow of resin during resin molding.
FIG. 18 is a plan view of the lead frame after resin molding. A sealing resin 16 is desirably formed to seal off the semiconductor device 30, the gold wire 31 and the inner lead 12 inside a broken line 32 in FIG. 17, but the resin flows out to the tie bars 14 in practice, as shown in FIG. 18. FIG. 19 is an enlarged view of an area E of the lead frame 10 after the step of resin molding in FIG. 18. A hatched portion 17 in FIG. 19 indicates a burr formed between the leads by a part of the sealing resin which is stopped by the tie bar 14 and hardened there.
FIG. 20 is an enlarged plan view showing the tie bars being cut in the lead machining process, in which 18 is a tie bar cutting punch for cutting the tie bars. FIG. 21 is a side view as viewed in the direction of an arrow F in FIG. 20, in which 19 is a tie bar cutting die for supporting the outer lead portions 13 in the step of die cutting.
Further, FIG. 22 is an enlarged plan view of the lead frame after cutting the tie bars, in which 20 is a leftover of the burr between the leads after being cut by the tie bar cutting punch 18, and 21 is a leftover of the tie bar 14 after being cut. The steps of manufacturing semiconductor devices by using the prior art lead frame, arranged as above, will be briefly described below with reference to a flowchart shown in FIG. 23.
First, as shown in FIG. 17, the semiconductor device 30 is die bonded onto the island 11 (die bonding step). Then, electrodes of the semiconductor device 30 mounted on the island 11 are connected to the inner lead portions 12 by the gold wires 31 (wire bonding step). After that, the lead frame 10 including the semiconductor devices 30 each connected to the associated inner lead portions 12 is set in a resin sealing mold (not shown). Resin molding is carried out to cover an area inside the broken line 32 in FIG. 17, including the island 11, the semiconductor device 30, the inner lead portions 12 and the gold wires 31, whereby the sealing resin 16 shown in FIG. 18 is formed (molding step). Then, the sealing resin 16 formed in the molding step, the lead frame 10, etc. are deburred (deburring step). Note that the burrs 17 between the leads are not removed in this step. Then, the outer lead portions 13 of the lead frame 10 are plated with solder (plating step).
The lead frame 10 thus resin molded and plated with solder is then transferred to a subsequent lead machining process. In this process, the tie bars 14 are cut by the tie bar cutting punch 18 as shown in FIGS. 20 and 21 (tie bar cutting step). Following that, the outer lead portions 13 are cut to the predetermined size and each semiconductor device is disconnected from the lead frame (lead cutting step). Finally, the leads are bent into the predetermined form (lead forming step).
In the tie bar cutting step of the lead machining process, as shown in FIGS. 20 and 21, parts of the tie bars 14 and the burrs 17 between the leads are simultaneously cut by cooperation of the tie bar cutting punch 18 and the tie bar cutting die 19. This results in the state as shown in FIG. 22 where the leftovers 20 of the burrs between the leads and the leftovers 21 of the tie bars after being cut remain in place. Additionally, the tie bar cutting punch 18 must have comblike edges corresponding to the pitch of the outer lead portions 13 and hence requires high accuracy.
The prior art lead frame for semiconductor devices arranged as previously described has had the following problems in manufacturing semiconductor devices.
First, the prior art lead frame entails the step of tie bar cutting, and comblike edges 18a of the tie bar cutting punch for cutting the tie bars became considerably worn, as indicated by broken lines in FIG. 24, as a result of the repeated cutting. Also, because the comblike edges 18a of the punch correspond to the pitch of the outer lead portions of the semiconductor device, they are very thin and liable to break. Therefore, it is hard to stably cut the tie bars 14, causing deformation of or damage to the leads. This has led to failed semiconductor devices and hence degraded production efficiency significantly.
Also, because the burrs between the leads are cut as well in the step of tie bar cutting, the outer lead portions are likely to be contaminated with burr chips that are scattered at the time of cutting.
Further, when the tie bars are positioned in a region where the leads are to be bent, the leads cannot be steadily shaped into the predetermined form because of the influence of the leftovers 21 of the tie bars after being cut, cutting burrs 13a caused upon cutting the tie bars as shown in FIG. 24, fractured surfaces, and so on. In gullwing type semiconductor devices, particularly, the flatness of a plane defined by distal ends of the leads to be mounted to a circuit substrate or the like is reduced. Incidentally, the more the comblike edges 18a of the punch are worn, the larger the cutting burrs 13a.
Manufacture of the tie bar cutting punch is difficult, for a punch used for semiconductor devices with outer lead portions having a fine pitch less than 0.4 mm, comblike edges of the punch because the pitch is so small and the durability of the outer lead portions is not ensured in mass production because the comblike edges are too thin.